Réalisations du responsable dans le domaine de l’UE
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IEEE’88, Greiner A., Mehrez H., Noguez G., Galisson A., Sueur F., "On the architecture and design of cascadable high performance single chip FFT processor", IEEE Workshop on VLSI Signal Processing, 2-4 nov. 1988, Monterey-California
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ICSPAT'95, Aberbour M.,Gounoud S.,Houelle A., Mehrez H., Vaucher N "A Fully Parametrized IEEE Floating Point Operators Library For Use In Digital Signal Processing" ICSPAT 95, Boston MA USA, October 24-26, 1995, pp 886-890
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ICSPAT'96, Aberbour M.,Houelle A., Mehrez H., Vaucher N, G. Besencenet*, E. Dupont-Nivet*, F. Durbin*, T. Garrié* & A. Tissot* (*CEA-DAM) "A Parametrized Real Time Image Convolvor" ICSPAT 96, Boston MA USA, October 7-10, 1996, pp 1885-1889. Vol.2
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ICSPAT'98, M. Aberbour, A. Houelle, H. Mehrez , N. Vaucher G. Besencenet*, E. Dupont-Nivet*, F. Durbin*, T. Garrie*, A. Tissot*, `Algorithms and VLSI Architectures for Pattern Recognition Based on the Gabor Wavelets' Proc. International Conference on Signal Processing Applications and Technology ICSPAT'98, Toronto, Canada,
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ICSPAT'2000, Y. Dumonteix, H. Aboushady, H. Mehrez, and M.M. Louërat, Low power comb decimation filter using polyphase decomposition for mono-bit analog-to-digital converters, In Proc. International Conference on Signal Processing Applications and Tech-nology, Dallas, Texas, USA, october 2000
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