Modelling of Electromagnetic Conducted Emissions in Integrated Circuits The main objective of this paper is to define a new method which is able to predict the electromagnetic emission of integrated circuits. This paper deals with the modeling of conducted electromagnetic emissions of integrated circuits power/ground terminals based on the main source of electromagnetic interference. The test circuits were designed and printed circuit boards were prepared to measure the input impedance at the power supply pin of the integrated circuit. S-parameters measurement of the test circuit was performed by network analyzer in the frequency range from 10 MHz to 2 GHz, and then Z parameters were obtained via S parameters. After being deleted all the impedance effects by the de-embedding technique, the passive RLC circuit was extracted by analytically and using modified genetic algorithm. Then, the internal current was obtained by two different methods. One of them was the spectrum analyzer which is used to obtain the internal current of the die and the second method was obtained by a theoretical way. In order to obtain this current, both the behaviour of the passive supply network impedance and the profile of the instantaneous current consumed by the chip core have to be identified. Then the model was formed by lines of current characterized by an intensity of current and an orientation in the plane. The electromagnetic near-field measurement has been done for different frequency for examining the currents which pass from the power supply pins. Two different current values obtained by two models were created. Two model results were compared to the measurement results. The model shows very good agreement with the measurements.
