6.7.2Intermediate rounding and clipping issues
6.7.2.1.1.1.1.1.1JCTVC-F318 On the precision of interpolation processing [T. Chujoh, T. Yamakage (Toshiba)]
In this contribution, the precision of interpolation processing is discussed. The current HEVC Test Model (HM) uses 8-tap filter coefficients with 6-bit precision for luminance pixels and 4-tap filter coefficients with 6-bit precision for chrominance pixels and a high accuracy bidirectional prediction method. It is alleged that there are problems about precision of interpolation processing. Some rounding and clipping are introduced for 16-bit input and output specification; however since the filter coefficients and tap-length are under consideration in CE3, the design might be changed in the future. It is proposed for all intermediate rounding and clipping to be removed. If there is no intermediate rounding and clipping, the order of operation for interpolation processing is changeable. This can expand the implementation possibility of encoder and decoder. In that case, even with 14-bit pixel input, all outputs do not exceed singed 32-bit integer.
Proposes, for current purposes, the removal of all intermediate rounding and clipping and right shifting.
The contribution does not necessarily assume that the design would stay that way in its final form.
It was remarked that this could cause a problem with testing of high-precision interpolation coefficients since doing that would cause overflows.
6.7.2.1.1.1.1.1.2JCTVC-F637 Cross-check report for JCTVC-F318: on the precision in MC process [K. Kondo, T. Suzuki (Sony)] [late reg. 07-05, upload 07-05]
6.7.2.1.1.1.1.1.3JCTVC-F480 Unified design for motion compensation filter [C. Kim, S. Jeon (Samsung)]
This contribution presents a scheme for handling right shifting in the motion compensation process. This differs from JCTVC-F318 by including some right shifting before bipredictive averaging and in the unipred case.
It also differs somewhat from JCTVC-F537.
6.7.2.1.1.1.1.1.4JCTVC-F537 On the motion compensation process [F. Bossen (Docomo USA Labs)]
This contribution proposes two modifications to the motion compensation process to simplify the process by removing rounding operations and to ensure that all data after each of the vertical and horizontal filtering passes fits in 16-bit memory. With these modifications, simplified and corrected reference software and text are proposed in which the proposed code is several thousand lines of code shorter than the current one, and the text is also shortened. The proposed modifications have a negligible impact on coding efficiency (all reported average BD-rate differences for luma are 0.0%) and on run times (98-103%). Commonalities exist with the proposals described in JCTVC-F480 and JCTVC-F585, which were independently developed. A confirmation of the performance reported in JCTVC-F480 is provided, as well as a comparative analysis.
Avoids violations of 16 bit range.
Avoids some cascaded rounding.
Handles aspects related to higher bit depth samples.
Significantly simplifies the software and text.
Decision: Adopted.
6.7.2.1.1.1.1.1.5JCTVC-F733 Modification to JCTVC-F537: 16-bit bi-prediction interpolation process [M. Coban, P. Chen, M. Karczewicz (Qualcomm)] [late reg. 07-13, upload 07-13]
Discusses certain aspects relating to issues in JCTVC-F537.
6.7.2.1.1.1.1.1.6JCTVC-F738 Cross-check of Qualcomm’s contribution on 16-bit bi-prediction interpolation process (JCTVC-F733) [A. Fuldseth (Cisco)] [late reg. 07-15, upload 07-20]
6.7.2.1.1.1.1.1.7JCTVC-F585 Luma interpolation precision [Muhammed Coban, Peisong Chen, Marta Karczewicz (Qualcomm)]
Discusses certain aspects relating to issues in JCTVC-F537.
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