A BoG was asked to concentrate on getting common understanding of the implementation complexity of the different methods and report back.
JCTVC-F251 was briefly presented to convey an understanding of the way the hardware analysis was done. Its analysis was based on automatic RTL generation from C code (Catapult C). In contrast to that, the TI/Cisco analysis from JCTVC-F446 uses an optimized silicon compiler. The BoG was asked to try to identify whether the data collected would enable reaching a common understanding, and if not, to work on improving the investigation methods such that relevant evidence would be available by the next meeting. JCTVC-F447 was also briefly presented.
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