Scheduling: Generally, meeting time was scheduled during 0900 – 2000, with coffee and lunch breaks as convenient. Some particular scheduling notes are shown below, although not necessarily 100% accurate:
First day (Thu. 18 Apr.): 0900–2000 (approximately), morning plenary, Tracks A and B in afternoon.
Second day (Fri. 19 Apr.): 0900–2000 (approximately), Tracks A and B (and BoG on HLS)
Third day (Sat. 20 Apr.): 1130-1300 (approximately) Track A, 1430–2000 Joint discussion between JCT-VC and JCT-3V on HLS for extensions
Fourth day (Sun 21 Apr): 0800–0900 Plenary status review, 0900-1900 AHG reports on software & RExt, followed by RExt CE & other technical inputs (J-BoG on HLS for extensions, BoG on position calculation).
Discussion of RExt and version 1 issues started on Sunday.
Fifth day (Mon 22 Apr): Morning MPEG plenary, 1415 RExt (J-BoG on HLS continuation)
Sixth day (Tue 23 Apr):
0900 check on status of BoG activity. Then RExt and SHVC-related work in parallel
1130: 116-118 Main JCT-VC room: General and SHVC status review, HLS J-BoG and non-J BoG status reviewed, further BoG on RExt planned, HEVC verification testing planned.
1430: 116-118 Main JCT-VC room: Non-HLS SHVC
1430: 115 Parallel JCT-VC room: RExt
1430: 203 BoG 1 room: Joint & 3V high-level syntax