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9.5CE6d Parallel intra coding

9.5.1.1.1.1.1.1.1JCTVC-D074 CE6: Parallel intra coding [Jie Zhao, Andrew Segall]

In a previous contribution (JCTVC-B112) a concept of a parallel prediction unit (PPU) within the HEVC test model (HM) design was proposed. The goal of the parallel prediction unit is to define a group of pixels that are intra-coded, and where the intra-coding may be done in a parallel fashion. Parallelization is achieved by partitioning the intra-coded blocks into two sets. Blocks in the first set are predicted in parallel using available pixels outside PPU; blocks in the second set are also predicted in parallel using available pixels outside the PPU as well as pixels from the first set of blocks. The contributor implemented parallel intra coding into HM 0.9 and reported that the parallel intra coding results in negligible impact on coding efficiency. For all intra coding, approximately a .3% loss in coding efficiency when the PPU is 16x16. For random access and low delay configurations, between 0.0% and 0.1% loss in coding efficiency. For all cases, a PPU of 16x16 means that 4x4 blocks are processed in parallel.

Subdivision of block groups into 2 subsets in a checkerboard-like approach. When the first subset is decoded, the second subset can even be predicted from blocks below (non-causal). The second set is using weighted prediction.

BD rate loss roughly 0.3% for intra. Encoding time increase was observed (due to necessity of comparing different block configurations in tradeoff between parallelism and efficiency), but this was compensated avoided by further optimization.

The second subset requires more computation due to weighted prediction, which is however not noticeable in terms of decoding time.

Block structures not allowing regular checkerboard might affect the advantage of parallel processing, but this should have some lower limit.

9.5.1.1.1.1.1.1.2JCTVC-D111 CE6 Subset D: Cross check report of Sharp's proposal (JCTVC-B112) from Toshiba [A. Tanizawa, T. Shiodera (Toshiba)]