JCTVC-B050 [B. Lee, M. Kim (KAIST), H. Y. Kim, J. Kim, J. S. Choi (ETRI)] Hierarchical variable block transform
In this contribution, a rate-distortion optimized variable block transform coding scheme was proposed based on hierarchical variable-sized block transforms for macroblock (MB) coding with a the order-4 and -8 integer cosine transform (ICT) kernels of H.264 | MPEG-4 Part 10 AVC in addition to a new proposed order-16 ICT kernel. The set of order-4, -8 and -16 ICT kernels were applied for inter-predictive coding in square (44, 88 or 1616) and two non-square (168 or 816) transform cases for each MB in a hierarchically structured manner. The proposal was tested in the KTA software context. The proposed hierarchical variable-sized block transform scheme using the order-16 ICT kernel reportedly achieves average 3.8% bitrate reduction for test sequences of Constraint Set 2 (low delay), compared to the High profile of H.264 | MPEG-4 Part 10 AVC and reportedly shows a promising possibility of further developments in conjunction with enlarged MBs in the future Test Model of HEVC.
Performance of the additional transforms seems best in high bit rate range (since this is where the transform is used more and fewer coding blocks are skipped) and when non-AVC KTA tools were disabled (since these reduce the amount of residual needing to be coded with the transform). Adding an order-32 case was asserted to potentially improve performance further.
It was remarked that some of the added block sizes might not get used very much if 32x32 is also available, and that if an encoder needs to consider their use, this would be an added processing burden for encoders.
It was also remarked that requiring a decoder to support more transforms imposes an added burden on decoder implementation.
Further study was encouraged.
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