Organisation internationale de normalisation

5.2Contributions

5.2.1.1.1.1.1.1.1JCTVC-D367 CE2: Asymmetric motion partition with overlapped block motion compensation [M.-S. Cheon, I.-K. Kim, L. Guo, P. Chen, M. Karczewicz]

For HE RA, 1.0% BR improvement, and 13% and 2% impact on encoder and decoder runtimes; for HE LD, 1.2% BR improvement, and 10% and -1% impact on encoder and decoder runtimes.

The AMP scheme was somewhat different than what had previously been implemented in the TMuC software.

AMP was only being used for CU sizes 16x16 and above (which was not described in the document).

A participant also asked about the encoder optimization algorithm for this proposal, which was apparently not described in the contribution.

5.2.1.1.1.1.1.1.2JCTVC-D328 CE2: Cross-checking of Asymmetric motion partitioning with OBMC proposal from Samsung and Qualcomm [E. Francois, P. Bordes (Technicolor)]

Cross-check for JCTVC-D367.

5.2.1.1.1.1.1.1.3JCTVC-D298 CE2: Cross-verification of AMP from Samsung [X. Zheng (HiSilicon), H. Yu (Huawei)]

Cross-check for JCTVC-D367.

5.2.1.1.1.1.1.1.4JCTVC-D297 CE2: Huawei & HiSilicon report on Flexible Motion Partitioning [X. Zheng (HiSilicon), H. Yu (Huawei)]

One version of the proposal provided the following results:

For HE RA, 3.2% BR improvement, and 243% and 0% impact on encoder and decoder runtimes; for HE LD, 2.7% BR improvement, and 200% and -5% impact on encoder and decoder runtimes.

The test results were incomplete in the initial uploaded version of the contribution.

A 'faster' version achieved 3.0% and 3.4% BR savings on average for the RA and LD cases, and a 'diagonal-only' variation resulted in about 1.6% and 1.7% BR savings on average for the RA and LD cases.

5.2.1.1.1.1.1.1.5JCTVC-D405 CE2: Cross-check results of Huawei & HiSilicon’s proposal [J. Kim, J. Lee, H. Y. Kim]

Cross-check for JCTVC-D297.

5.2.1.1.1.1.1.1.6JCTVC-D418 CE2: Cross-verification report for Huawei's proposal (JCTVC-D297) from Microsoft J. Xu (Microsoft) (late registration Tuesday 18th, uploaded Wednesday 26th, near the end of the meeting)

Cross-check for JCTVC-D297.

5.2.1.1.1.1.1.1.7JCTVC-D230 CE2: Simplified Geometry Block Partitioning [E. Francois, P. Bordes (Technicolor), L. Guo, M. Karczewicz (Qualcomm)]

Version 1:

For HE RA, 2.8% BR improvement, and 90% and -3% impact on encoder and decoder runtimes; for HE LD, 3.0% BR improvement, and 90% and 1% impact on encoder and decoder runtimes.

Version 2 "Faster":

HE RA 1.9%, 30%, -2%; HE LD 2.2%, 34%, 0%.

5.2.1.1.1.1.1.1.8JCTVC-D368 CE2: Overlapped Block Motion Compensation for Geometry Partition Block [L. Guo, P. Chen, M. Karczewicz (Qualcomm)]

For HE RA, 2.0% BR improvement, and 29% and 5% impact on encoder and decoder runtimes; for HE LD, 2.3% BR improvement, and 36% and 3% impact on encoder and decoder runtimes.

5.2.1.1.1.1.1.1.9JCTVC-D427 CE2: Crosscheck of Qualcomm’s proposal of JCTVC-D368 by MediaTek [Jicheng An, Xun Guo] (late registration Thursday 20th after start of meeting, uploaded Thursday 27th, near the end of the meeting)

Cross-check for JCTVC-D368. Uploaded very late.

5.2.1.1.1.1.1.1.10JCTVC-D173 CE2-subset 4: Cross-check report of Technicolor’s proposal on Geometry adaptive block partitioning Simplification from INRIA [Laurent Guillo, Ronan Boitard]

Cross-check for JCTVC-D368.