Zheng-Hong Cai, Hiroyuki Yotsuyanagi and Masaki Hashizume : Modified PRPG for Test Data Reduction Using BAST Structure, Journal of Signal Processing, Vol.21, No.4, 125-128, 2017.
Takafumi Katayama, Tian Song, Wen Shi, Xiantao Jiang and Takashi Shimamoto : Fast Edge Detection and Early Depth Decision for Intra Coding of 3D-HEVC, International Journal of Advances in Computer and Electronics Engineering, Vol.2, No.7, 11-20, 2017.
Masaki Hashizume, Yudai Shiraishi, Hiroyuki Yotsuyanagi, Hiroshi Yokoyama, Tetsuo Tada and Shyue-Kung Lu : Electrical Test of Resistive and Capacitive Open Defects at Data Bus in 3D Memory IC, Journal of Telecommunication, Electronic and Computer Engineering, Vol.9, No.3-2, 39-42, 2017.
Fara Alia Ashikin, Akihiro Odoriba, Masaki Hashizume, Hiroyuki Yotsuyanagi and Shyue-Kung Lu : Electrical Tests for Capacitive Open Defects in Assembled PCBs, Journal of Telecommunication, Electronic and Computer Engineering, Vol.9, No.3-2, 49-52, 2017.
Takafumi Katayama, Tian Song, Wen Shi, Gen Fujita, Xiantao Jiang and Takashi Shimamoto : Hardware Oriented Low-Complexity Intra Coding Algorithm for SHVC, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol.E100-A, No.12, 2936-2947, 2017.
Xiantao Jiang, Xiaofeng Wang, Tian Song, Wen Shi, Takafumi Katayama, Takashi Shimamoto and Jenq-Shiou Leu : An Efficient Complexity Reduction Algorithm for CU Size Decision in HEVC, International Journal of Innovative Computing, Information and Control, Vol.14, No.1, 309-322, 2018.
2017年度(平成29年度) / 学術論文 (紀要その他)
2017年度(平成29年度) / 学術レター
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Daiki Nariai, Minh Hai Tran, Yoko Uwate and Yoshifumi Nishio : Synchronization in Two Rings of Coupled Three van der Pol Oscillators, Journal of Signal Processing, Vol.21, No.4, 121-124, 2017.
2017年度(平成29年度) / 総説・解説
2017年度(平成29年度) / 国際会議
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Ryota Fujiki, Yuhki Yano, Tian Song, Takashi Shimamoto and Nobutatsu Nakamura : Training Library Generation for Automatic Sea Cucumber Recognition, Proceedings of International Technical Conference on Circuits/Systems, Computers and Communications(ITC-CSCC2017), 468-469, Busan, Jul. 2017.
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Shota Yusa, Takafumi Katayama, Wen Shi, Tian Song and Takashi Shimamoto : Fast CU Depth Decision Algorithm Using Depth-Map for 3D-HEVC, Proceedings of International Technical Conference on Circuits/Systems, Computers and Communications(ITC-CSCC2017), 473-474, Busan, Jul. 2017.
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Koki Tamura, Takafumi Katayama, Wen Shi, Tian Song and Takashi Shimamoto : Coding Efficiency Improvement Algorithm for Inter-Layer Reference Prediction in SHVC, Proceedings of International Technical Conference on Circuits/Systems, Computers and Communications(ITC-CSCC2017), 479-480, Busan, Jul. 2017.
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Michiya Kanda, Masaki Hashizume, Hiroyuki Yotsuyanagi and Shyue-Kung Lu : Capacitive Open Detection in 3D ICs with A Built-in Comparator of Offset Cancellation Type, IEEE 2017 Taiwan and Japan Conference on Circuits and Systems, Aug. 2017.
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Kouhei Ohtani, Naho Osato, Masaki Hashizume, Hiroyuki Yotsuyanagi and Shyue-Kung Lu : A Defect Level Monitor of Resistive Open Defect at Interconnects in 3D ICs by Injected Charge Volume, Proc. of 17th International Symposium on Communications and Information Technologies, 46-50, Cairns, Sep. 2017.
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Yuuya Ohama, Masaki Hashizume, Hiroyuki Yotsuyanagi, Yoshinobu Higami and Hiroshi Takahashi : On Selection of Adjacent Lines in Test Pattern Generation for Delay Faults Considering Crosstalk Effects, Proc. of 17th International Symposium on Communications and Information Technologies, 96-100, Cairns, Sep. 2017.
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Jiang Xiantao, Wang XiaoFeng, Yang Yadong, Tian Song, Shi Wen and Katayama Takafumi : A Coding Efficiency Improvement Algorithm for Future Video Coding, IFIP International Federation for Information Processing 2017, 279-287, Shanghai, Oct. 2017.
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Michiya Kanda, Masaki Hashizume, Hiroyuki Yotsuyanagi and Shyue-Kung Lu : A Defective Level Monitor of Open Defects in 3D ICs with a Comparator of Offset Cancellation Type, 2017 IEEE Int. Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 1-4, Cambridge, Oct. 2017.
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Michiya Kanda, Masaki Hashizume, Hiroyuki Yotsuyanagi and Shyue-Kung Lu : A Built-in Current Sensor Made of a Comparator of Offset Cancellation Type for Electrical Interconnect Tests of 3D ICs, Proc. of IEEE CPMT Symposium Japan 2017, 137-138, Kyoto, Nov. 2017.
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Kouhei Ohtani, Naho Osato, Masaki Hashizume, Hiroyuki Yotsuyanagi and Shyue-Kung Lu : Resistive Open Defects Detected by Interconnect Testing Based on Charge Volume Injected to 3D ICs, Proc. of IEEE CPMT Symposium Japan 2017, 231-234, Kyoto, Nov. 2017.
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Ayumu Kambara, Hiroyuki Yotsuyanagi, Daichi Miyoshi, Masaki Hashizume and Shyue-Kung Lu : Open Defect Detection with a Built-in Test Circuit by IDDT Appearance Time in CMOS ICs, Proc.of IEEE 26th Asian Test Symposium, 237-242, Taipei, Nov. 2017.
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Shyue-Kung Lu, Shu-Chi Yu, Masaki Hashizume and Hiroyuki Yotsuyanagi : Fault-Aware Page Address Remapping Techniques for Enhancing Yield and Reliability of Flash Memories, Proc.of IEEE 26th Asian Test Symposium, 249-254, Taipei, Nov. 2017.
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Satoshi Hirai, Hiroyuki Yotsuyanagi and Masaki Hashizume : Reordering Delay Elements in Boundary Scan Circuit with Embedded TDC, the 18th IEEE Workshop on RTL and High Level Testing, Taipei, Dec. 2017.
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Morito Niseki, Toshinori Hosokawa, Masayoshi Yoshimura, Hiroshi Yamazaki, Masayuki Arai, Hiroyuki Yotsuyanagi and Masaki Hashizume : A Sequentially Untestable Fault Identification Method Based on State Cube Justification, the 18th IEEE Workshop on RTL and High Level Testing, Taipei, Dec. 2017.
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Takafumi Katayama, Wen Shi, Tian Song and Takashi Shimamoto : Pixel-based Fast CU Depth Decision Algorithm with Edge Strength for HEVC, Proceedings of IEEE International Conference on Consumer Electronics(ICCE2018), 407-412, Las Vegas, Jan. 2018.
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Kazuki Kuroda, Takafumi Katayama, Tian Song and Takashi Shimamoto : Early Mode Selection of High Resolution for HEVC Base on Bits-Mapping, Proceedings of IEEE International Conference on Consumer Electronics(ICCE2018), 428-433, Las Vegas, Jan. 2018.
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Yoshiki Ito, Tian Song, Wen Shi, Takafumi Katayama and Takashi Shimamoto : Hardware-oriented Low Complexity Motion Estimation for HEVC, Proceedings of IEEE International Conference on Consumer Electronics(ICCE2018), 438-442, Las Vegas, Jan. 2018.
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Wen Shi, Takafumi Katayama, Tian Song and Takashi Shimamoto : Efficient Intra Prediction Based on Adaptive Downsampling Signal for Parallel HEVC Encoding, Proceedings of IEEE International Conference on Consumer Electronics(ICCE2018), 621-624, Las Vegas, Jan. 2018.
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Hanna Soneda, Michiya Kanda, Masaki Hashizume, Hiroyuki Yotsuyanagi and Kung Shyue LU : Detectable Resistive Open Defects in 3D ICs with Electrical Interconnect Test Circuit Made of Diodes, Proc. of 2018 RISP International Workshop on Nonlinear Circuits, Communications, 655-658, Mar. 2018.
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Miyatake Noriko, Masaki Hashizume, Hiroyuki Yotsuyanagi, Hiroshi Yokoyama and Tetsuo Tada : Oscillation Frequency Estimation of Ring Oscillator for Interconnect Tests in 3D Stacked ICs, Proc. of 2018 RISP International Workshop on Nonlinear Circuits, Communications, 659-662, Mar. 2018.
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Takafumi Katayama, Kazuki Kuroda, Tian Song, Jenq-Shiou Leu and Takashi Shimamoto : Multi-Input CNN-based Low-Complexity Intra Coding Algorithm for HEVC, Proceedings of 4th International Forum on Advanced Technologies (IFAT2018), No.P1-28, 1-3, Tokushima, Mar. 2018.
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Michiya Kanda, Masaki Hashizume, Hiroyuki Yotsuyanagi and Shyue-Kung Lu : Resistive Open Defect Detection in 3D ICs with a Comparator of Offset Cancellation Type under Process Variation, Proc. of International Forum on Advanced Technologies 2018, P1-11-1-P1-11-3, Tokushima, Japan, Mar. 2018.
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Alia Ashikin Fara, Masaki Hashizume, Hiroyuki Yotsuyanagi and Shyue-Kung Lu : Electrical Tests for Capacitive Open Defects in Assembled PCBs, Proc. of International Forum on Advanced Technologies 2018, P1-12-1-P1-12-3, Tokushima, Japan, Mar. 2018.
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Jumpei Kawano, Hiroyuki Yotsuyanagi and Masaki Hashizume : Effect of Routing in Testing a TSV Array Using Boundary Scan Circuit with Embedded TDC, Proc. of International Forum on Advanced Technologies 2018, P1-13-1-P1-13-3, Tokushima, Japan, Mar. 2018.
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Takafumi Katayama, Kazuki Kuroda, Wen Shi, Tian Song and Takashi Shimamoto : Low-Complexity Intra Coding Algorithm Based on Convolutional Neural Network for HEVC, Proceedings of 2018 International Conference on Information and Computer Technologies (ICICT2018), 115-118, DeKalb, USA, Mar. 2018.
2017年度(平成29年度) / 国内講演発表
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薮井 大輔, 四柳 浩之, 橋爪 正樹 : BC1タイプのバウンダリスキャンテスト回路を用いた実装基板のオンライン配線検査法, 第27回マイクロエレクトロニクスシンポジウム講演論文集, 2017年8月.
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紫和 滉章, 島本 隆, 宋 天 : 3次元グローバル配置におけるTSV カップリング削減に関する研究, 電気関係学会四国支部連合大会講演論文集, No.1-22, 22, 2017年9月.
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鍬田 理沙, 島本 隆, 宋 天 : 複数ネットにおける長さ整合のための配線アルゴリズムに関する研究, 電気関係学会四国支部連合大会講演論文集, No.1-23, 23, 2017年9月.
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田中 宏樹, 宋 天, 島本 隆 : 顕著性検出を用いた動画像符号化アルゴリズムに関する研究, 電気関係学会四国支部連合大会講演論文集, No.13-16, 150, 2017年9月.
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片山 知拓, 四柳 浩之, 橋爪 正樹, 樋上 喜信, 高橋 寛 : パス順位比較を用いる半断線故障の検査可能性評価, 電気関係学会四国支部連合大会講演論文集, 86, 2017年9月.
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須崎 晴登, 月本 功, 四柳 浩之, 橋爪 正樹 : 電流テスト法によるLSI実装時半断線故障の検出可能性評価, 電気関係学会四国支部連合大会講演論文集, 79, 2017年9月.
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宮武 典子, 四柳 浩之, 横山 洋之, 橋爪 正樹, 多田 哲生 : リングオシレータを用いた3D IC内ダイ間配線検査法の発振周波数の温度依存性調査, 電気関係学会四国支部連合大会講演論文集, 80, 2017年9月.
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岡本 匡史, 四柳 浩之, 橋爪 正樹, Shyue-Kung Lu : 3D IC内ダイ間配線に流す静的電流による抵抗断線検出用検査回路の製造ばらつきの影響調査, 電気関係学会四国支部連合大会講演論文集, 81, 2017年9月.
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神田 道也, 橋爪 正樹, 四柳 浩之, Shyue-Kung Lu : オフセットキャンセル型コンパレータを用いた3D IC内ダイ間配線の断線レベル検出の可能性, 電気関係学会四国支部連合大会講演論文集, 82, 2017年9月.
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神原 東風, 大谷 航平, 四柳 浩之, 橋爪 正樹 : IDDT出現時間に基づく検査法の断線故障検出能力向上のための設計, 電子情報通信学会技術研究報告, Vol.117, No.274, 125-130, 2017年11月.
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平井 智士, 四柳 浩之, 橋爪 正樹 : TDC組込み型バウンダリスキャンにおける遅延付加部のリオーダによる配線長の低減, 電子情報通信学会技術研究報告, Vol.117, No.444, 13-18, 2018年2月.
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矢野 雄基, 藤木 良太, 宋 天, 島本 隆 : 機械学習を用いた海鼠の認識システムの開発に関する研究, 電子情報通信学会総合大会講演論文集, No.D-8-1, 76, 2018年3月.
2017年度(平成29年度) / 作品等
2017年度(平成29年度) / その他・研究会
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