Table of contents monday, September 9, 1: 30pm-4: 00pm modular Multi-Level Converters, hvdc, and dc grids I 3
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- Poster Session: Control, Modelling and Optimization of Power Converters
| P710 A High-Power-Density Single-Phase Inverter with Pulse Current Injection Power Decoupling Method [#264]
Xiaofeng Lyu, Yanchao Li, Ngoc Dung Nguyen, Ze Ni and Dong Cao, North Dakota State University, United States This paper presents high-power-density inverter with pulse current injection power decoupling method. In order to reduce the dc-link capacitor significantly, dc-link current is fully analyzed with double Fourier method in theory. Compared with the traditional 2nd harmonic power decoupling method, the pulse current injection method considers not only 2nd order harmonic but also the higher order harmonics. As a result, it can further reduce the dc-link capacitor value. The relationship between the dc-link capacitor value and different order harmonics has been investigated and analyzed. It shows that when dc-link capacitor value is reduced to one critical value, traditional 2nd harmonic power decoupling method is limited. Finally, one novel pulse current injection method is proposed and verified by simulation. P711 Hybrid Multilevel Converter based on Flying Capacitor and Extended Commutation Cell [#412]
The extended commutation cell (ECC) is a promising switching cell that allows for bidirectional energy transport in two orthogonal directions throughout the cell. By combining the ECC with a flying capacitor (FC) converter topology, a multilevel converter with a high number of levels can be assembled. This paper presents the analysis of a hybrid converter composed of an arbitrary number of ECCs and a flying capacitor. A 3 kW inverter configuration consisting of two ECCs and a flying capacitor is designed and verified by simulation. The result is a 12-level hybrid converter with equidistant output levels and closed loop control of the capacitor voltages of the ECC and FC. The required number of switches decreases from 22 in a 12-level FC converter to 12 in the proposed hybrid configuration, with the addition of two inductors. P712 A Novel Hybrid Five-Level Voltage Source Converter Based on T-Type Topology for High-Efficiency Applications [#223]
A novel hybrid five-level voltage source converter for high-efficiency applications is presented and investigated in this paper, and the topology configuration is based on the upgrade of three-level T-type converter and two- level converter. Compared with traditional stacked multilevel converter and flying capacitor multilevel converter, this hybrid multilevel converter generates desired staircase voltage levels with a reduced number of power devices and isolated drivers. It has nine redundant switching state combinations in hybrid five-level converter, which makes it easy to balance the flying capacitor voltage and realize fault-tolerant operation. A simple control strategy based on phase disposition PWM method is presented for the proposed hybrid converter, in order to generate desired levels while control the flying capacitor voltage. The performance of the hybrid multilevel converter is investigated in MATLAB/Simulink under various operating conditions. The effectiveness of the proposed hybrid multilevel converter is validated by experimental platform. P713 Flying-Capacitor-Clamped Five-Level Inverter Based on Switched-Capacitor Topology [#333]
This paper proposed a novel flying-capacitor-clamped five-level inverter based on bridge modular switched-capacitor topology. The inverter features the switched-capacitor circuit with step-up ability and the multilevel inverter circuit with flying-capacitor-clamped performance. With the composite structure, the number of components is cut down compared with the topology of conventional multilevel inverter, the voltage stress of most switches can be reduced, and part of switches can be operated under line voltage frequency. Hence, the potential of system efficiency and power density is released due to embed switched-capacitor circuit. Also, the cost is reduced obviously. More important, the optimized carrier-based phase disposition (PD) PWM method is employed as control strategy, the capacitor voltage can realize self-balance and quality of output waveform is improved significantly. After simulation, the prototype is built to validate the correctness and practicability of the analysis. P714 Cascaded Three-phase Quasi-Z Source Photovoltaic Inverter [#383]
With the applications and development of photovoltaic micro grid within the framework of low voltage distribution network, the research on topology, output quality and costs of three-phase grid-connected photovoltaic inverter has become one of the recent focus. A multiplexed inverter topology cascaded by line voltage is proposed, which composes three modules: PV panel, quasi-z source network and three-phase inverter. Through an analysis of the function feature of established mathematical model, an improved dual-loop control system is proposed. To demonstrate the effectiveness of the topology and control system, a simulation model is built. Voltage boost is added in the improved dc side, where 180V PV input voltage of each module can realize 380V direct grid-connection without transformer. Costs and switch frequency are decreased, and harmonic content of grid current is merely 2.09%. The proposed control methodology is fit in three- phase grid-connection generation system with new energy. P715 Hybrid Three-Phase Four-Wire Inverters Based on Modular Multilevel Cascade Converter [#769]
This paper presents two hybrid four-leg inverters that can be be employed in unbalanced three-phase systems. The proposed topologies are based on a modular multilevel cascade converter (MMCC) with double-star chopper cells (DSCC) associated to a conventional two-level (2L) leg. A comparative analysis in terms of the harmonic distortion and semiconductor power losses between the proposed configurations and others four-leg inverters is presented. Additionally, a voltage balancing algorithm of the floating DC capacitors of the DSCC leg is presented to ensure the energy balance. At last, to investigate the proposed system and control strategy, simulation and experimental results are presented. P716 Hybrid Nine-Level Single-Phase Inverter Based on Modular Multilevel Cascade Converter [#771]
This paper presents a hybrid single-phase inverter based on a modular multilevel cascade converter (MMCC) with double-star chopper cells (DSCC). The proposed inverter is constituted by one five-level (5L) DSCC leg and one two-level (2L) leg, providing a nine-level voltage at its output. For this, a hybrid modulation technique is employed, allowing the DSCC leg to operate at the switching frequency and the 2L leg to operate at the fundamental frequency, which reduces switching losses. Compared to other nine-level cascaded H-bridge inverters, the proposed topology requires only one isolated voltage source and generates less losses in the semiconductors. At last, to investigate the proposed system and control strategy, simulation and experimental results are presented. P717 Multilevel Converter Based on Cascaded Three-Leg Converters With Reduced Voltage and Current [#772]
In this paper, modularity concept using standard three-leg converters is addressed. Three-phase cascade converters composed by standard three-leg converters are investigated. They are composed of three, nine, twenty-one or n three-leg converters. It permits to reduce levels of currents and voltages on switches compared to conventional three-phase module or cascaded Hbridge converter. Other advantages include a modular structure that leads to convenient construction, easy maintenance and extension to higher voltage and current levels. Dynamic model is developed, and a PWM strategy is designed to converter command accordingly with the control reference generated voltage. Comparisons in terms of harmonic distortion and semiconductor power losses, between proposed and conventional cascade H-bridge have been carried out. Simulation and experimental results are presented. P718 Operation of modular matrix converter with hierarchical control system under cell failure condition [#876]
A modular multilevel matrix converter (MMMxC) has nine arms and each of the arms is composed of H-bridge cells connected in cascade. It can be applied to high voltage ac-ac converters for variable speed wind turbines and motor drives. In this paper, employment of a hierarchical control system for the MMMxC is first considered to distribute computational burden among processors and simplify hardware implementation. The influence of the time delay due to communication of controllers on performance is investigated by numerical simulation. Second, the control scheme for the operation under a cell failure condition is proposed. In the case that a cell breaks down, the operation is continued not only by shorting the faulty cell with an external mechanical switch but by increasing capacitor voltage of the other cells in the same arm. Moreover, a constraint on output voltage of the arm that has the faulty cell is added to avoid occurrence of short circuit of arms. These changes of control schemes are easily implemented because of employing the control system with the hierarchical structure and a voltage space vector modulation control scheme without circulating current control. The proposed control scheme is verified by simulation. P719 The Delta-Connected Cascaded H-Bridge Converter Application in Distributed Energy Resources and Fault Ride Through Capability Analysis [#931]
There are two unbalanced conditions for cascaded converter in Renewable Energy Source (RES) system. One is from the different output power of RES in bridge cells, and the other is grid voltage unbalanced fault. This paper presents a flexible voltage control technique of Modular Multilevel Cascaded Converter with single-delta bridge cells (MMCC-SDBC) in the RES system for maintaining the stable operation under the unbalanced conditions. Moreover, the comparison of the fault ride through capability between MMCC with Single Star Bridge Cells (MMCC- SSBC) and MMCC-SDBC is addressed in this paper. The laboratory test results are given to verify the proposed method and the analysis. Poster Session: Control, Modelling and Optimization of Power Converters Monday, September 19, 5:30PM-7:00PM, Room: Exhibit Hall, Chair: Pericle Zanchetta, Luca Solero P901 Dual Sequence Current Control Scheme Implemented in DSRF with Decoupling Terms Based on Reference Current Feed-Forward [#69] Sizhan Zhou, Jinjun Liu and Zhang Yan, Xi'an Jiaotong University, China Injecting negative sequence current into the grid can improve the operating performance of grid-connected voltage source converters under unbalanced grid voltage conditions. In this paper, a dual sequence current control scheme was proposed to quickly track positive- and negative-sequence sinusoidal currents with zero steady state error, implemented in double synchronous reference frames and without requiring current positive- and negative-sequence component decomposition. The proposed method applied a proportional integrator controller in positive synchronous reference frame and only a integrator in negative synchronous reference frame. A reference cross transformation was introduced to avoid extracting current sequence components. Moreover, decoupling terms based on reference current feed-forward were used to realize decoupling control for both positive- and negative-sequence currents. Experimental tests were implemented on a laboratory prototype with 2kHz switching frequency to demonstrate the performance of the proposed dual sequence current control scheme. P902 Injecting 3rd Harmonic into the Input Curent to Improve the Power Factor of DCM Buck PFC Converter [#112]
The conventional Buck PFC converter adopts constant duty cycle control (CDCC), which can improve the PF to some degree. However, the peak and RMS values of the inductor current are large, which also occurs to the switch and diode. This paper derives the expressions of the input current and PF of DCM Buck PFC converter, and based on which, a kind of injecting 3rd current harmonic control (ICHC) is proposed so as to improve the PF in the whole input voltage range. Besides a higher PF, the proposed novel control achieves a lower output voltage ripple, a smaller rms value of the inductor current and a higher efficiency than the conventional control. The experimental results from a 120 W universal input prototype are presented to verify the validity of the proposed method. P903 Investigation of Reducing the Influence of Digital Control Delay to LCL-Type Grid-Connected Inverter [#188]
Digital control system usually introduces a beat of delay, which includes PWM upload delay and zero-order holder delay. The delay not only reduces the system phase margin, but also changes the impedance characteristics of active damping, which influences the system minimum phase property and threatens the stability of the injected current. In this paper, a PWM real-time upload method and the detailed digital implementation steps are proposed to eliminate PWM upload delay. Then the first-order high pass filter is proposed to compensate the zero-order holder delay of resonance frequency band. The combination of the two schemes increases the system phase margin and improves the compatibility between switch frequency and LCL resonance frequency, which makes system always maintain minimum phase property. A 3KW prototype is designed, and the proposed control method is verified by experiments. P904 Repetitive Control for Grid Connected Inverters with LCL Filter under Stationary Frame [#211]
In the synchronous rotating frame, coupling exists in the mathematical model of grid-connected inverter with LCL filter. Severe distortion will occur in the output current of inverter when grid voltage is unbalanced with harmonics contained.One basic measurement for power quality is the total harmonic distortion (THD) of the grid current, it should be no more than 5% for grid- connected photovoltaic array and wind turbines. In this paper a scheme of repetitive control for three-phase grid-connected inverters with LCL filter under stationary frame is proposed. The THD of the injected grid current is reduced effectively with the proposed scheme.Firstly repetitive control theory is briefly introduced.Grid-connected inverter with LCL filter is then modeled and the impact of unbalanced grid voltage and harmonics to grid-connected current is analyzed.In the proposed theory two separate decoupled control systems can be achieved when the mathematical model of grid-connected inverter with LCL filter is under stationary frame, hence complex decoupling process is not required.Then considering the hardware parameter of LCL filter and the influence of the system delay, specific design method of the repetitive controller is provided and tedious debugging process is avoided.Lastly experimental results verify the validity of the theoretical analysis and the feasibility of the proposed control strategy. P905 Direct Instantaneous Ripple Power Predictive Control for Active Ripple Decoupling of Single-Phase Inverter [#1103]
Active ripple decoupling technique of single-phase inverter is a popular topic to minimize the dc-link capacitance. However, the existing control methods are based on tracking sinusoidal or predetermined voltage waveform of compensation capacitor, where they assume the inverter outputs are pure sinusoidal voltage and current. Therefore, the performance of existing methods degrades when the inverter output voltage and current are not pure sinusoidal. Furthermore, the limited dynamic performance threatens the safety of dc-link capacitor when the load changes, because the inrush ripple power is injected into dc link with small capacitance and the dc-link voltage will suddenly rise up when the ripple power is not buffered during transients. In this paper, a direct instantaneous power predictive control is proposed to buffer ripple power of single-phase inverter, which combines instantaneous ripple power control with model predictive control to overcome the issues above. The proposed method tracks instantaneous ripple power rather than voltage or current waveform. In this way, it can fully buffer all ripple powers in the system even for distorted output voltage and current of inverter; the voltage waveform of capacitor has the different shape in different operation cases, which enables the full utilization of storage capacitor. Model predictive control makes the proposed method have fast dynamic and perfectly compensate ripple power during transients and steady states. The buck-type active ripple decoupling circuit is chosen by comparing with another typical topology to implement the proposed method. Simulation and experimental results on a 3-kW prototype verify the theoretical analysis and the proposed control method. P906 Input-Output Feedback Linearization Based Control for Quasi-Z-Source Inverter in Photovoltaic Application [#535]
The quasi-Z-source inverter (QZSI) has been presented suitable for solar photovoltaic applications mainly because of its one stage buck/boost capability and improved reliability. Carefully designed closed-loop control strategy is usually demanded by QZSI in photovoltaic applications for voltage boost, grid- connection and the maximum power point tracking (MPPT). Cascaded QZSI as to further step up voltage has even put on higher controlling requirements because of the interactive influence of one cascaded module on another. However, commonly used small signal analysis is a local linearization approach which is limited to represent the model of QZSI near its equilibrium point. Moreover, the high order state equation of the quasi-Z-source network usually provides hurdle for high performance controller with stable or fast response. This paper presents an input-output feedback linearization based control strategy for QZSI in two purposes: 1) to build a global linearized QZSI model with a wide operating range; and 2) to help design a controller with improved stable and dynamic performance. An average model for QZSI using state space averaging method is firstly developed. According to the analytic relation of system state variables, i.e. capacitor voltage and inductor current of the QZSI network, the fourth-order mathematical model is reduced to the second-order. Input-output feedback theory is applied to the state space averaging model, where inductor current is selected deliberately as the output of the controller's inner loop. A dc-link feedback loop is developed to validate the input-output feedback linearized model. Evidences are provided by simulation and experiment to show the effectiveness of the proposed controller, where the effect of unstable zero- dynamic on dc-link voltage is reduced, and consequently the transferring of disturbance from dc side to the ac side of the QZSI is mitigated effectively. P907 A Novel Neutral Point Potential Control for the Three-Level Neutral-Point-Clamped Converter [#599]
Three-level neutral-point-clamped (NPC) converters/inverters have become a popular topology for not only medium-voltage ($1$k-$33$k) but also low-voltage level industrial application because of its reduced transistor block voltage and lower output current distortion. The neutral point voltage balancing control is one of the important issues of NPC converter to ensure system operation since the voltage drift in neutral point could lead to low-frequency current distortion and increases the risk of over-voltage in power electronic semiconductor devices. This paper provides a zero-sequence voltage (ZSV) injection to charge and discharge electric potential in the upper or the lower capacitor for unipolar switching. In addition, a novel neutral point potential control by bipolar switching is presented in this paper, which has better control dynamic under pure reactive power operation. The concept of these two neutral point potential control methods will be introduced, and then the laboratory test results are presented for verification. P908 Phase Leading Input Current Compensation for CRM Boost PFC Converter [#646]
The traditional boost PFC converter in critical conduction mode (CRM) usually suffers from low power factor (PF) in high input voltage and light load conditions due to the influence of the differential mode (DM) capacitor. With the capacitive current flowing into the DM capacitor, the input current has an evident leading phase and a period of dead time in these conditions. In order to solve this problem, this paper proposes a simple improved peak current mode (PCM) control scheme for a CRM boost PFC converter by adding several passive components, which can compensate an equivalent capacitive current to the input current so that the leading phase and dead time of the input current can be eliminated and the PF is greatly improved. The theoretical analysis is presented and the experimental results verify the advantages of the proposed control scheme. P909 Paralleled Inverters with Zero Common-mode Voltage [#110]
This paper introduces a PWM method for paralleled inverters which can achieve zero common-mode voltage. The paralleled inverters are connected through coupling inductors to the load. Based on the voltage vectors in each inverter, paralleled voltage vectors are proposed to combine the reference voltage. The action time can be distributed to each inverter and achieve zero common mode voltage for output. The distribution of voltage vectors in the two inverters is balancing the voltage of the two inverters in each switching cycle to make sure the circulating current can be easily controlled through small coupling inductors. Simulation and experimental results are provided to validate the proposed method and showing that it is benefiting for both CM and DM noise reduction. P910 A Voltage Clamp Circuit for the Real-Time Measurement of the On-State Voltage of Power Transistors [#119]
For real-time monitoring of the on-resistance of a power transistor, the voltage and current should be measured during the switching operation. When the voltage waveform is measured, the amplifier inside the measuring oscilloscope may be distorted if the range of the measurement channel is not set wide enough to measure both on-state and off-state voltage levels, resulting in failure to accurately measure the voltage. Conventional circuits partially solve this problem by clamping the off-state voltage to a lower value. However, they introduce problems such as voltage peaks, measurement offset, and delays caused by RC time constants. In this paper, traditional clamping circuits are explained and discussed to illustrate their disadvantages first. Then, a new voltage clamp circuit is presented. The proposed circuit can solve the problems of RC time constants and voltage peaks during state transitions of the device under test. Finally, the performance of the proposed circuit is illustrated by measurements on a 100-kHz Buck converter.
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