Table of contents monday, September 9, 1: 30pm-4: 00pm modular Multi-Level Converters, hvdc, and dc grids I 3

10:55AM The Performance of Polytopic Models in Smart DC Microgrids [#918]
Airan Frances, Rafael Asensi, Oscar Garcia, Roberto Prieto and Javier Uceda, Universidad Politecnica de Madrid, Spain

The huge progress of power electronics technology along last decades opens ex extraordinary new possibilities for the electric grid. Some examples of what ca can be achieved with the incorporation of electronic power converters in the sy system are the penetration of RS (renewable sources) and storage, boosting re reliability and power quality, and integrating consumers as part of the system. Ho However, there are still some challenges ahead before the massive deployment of Sm Smart Grids. Lately, a lot of research has been carried out on converters topologies and control strategies in order to get the most out of the microgrids. Therefore, there is a need for methodologies that allow designers to foresee the behavior of these systems comprised of several different power converters governed by the proposed control strategies. In this context, this paper studies the performance of the polytopic models for the analysis of commercial power converters working in dc microgrids. This is a nonlinear modeling technique which integrates small-signal models obtained in different operation points by means of suitable weighting functions. Furthermore, the linear local models can be obtained in a blackbox fashion using suitable two-port models as can be the G-parameters models. This work particularly focuses on the analysis of different power converters using the well-known dc bus signaling control strategy. Thus the modeling of the diverse possible states in which this control technique can operate, and more important the transitions among them, are investigated. In addition, the feasibility of applying system level control techniques to the polytopic models of the converters, such as current sharing or voltage restoration, is considered.

11:20AM Study on DC Arc Faults in Ring-Bus DC Microgrids with Constant Power Loads [#1182]
Xiu Yao, University at Buffalo, SUNY, United States

DC microgrid offers significant advantages such as control simplicity and less conversion stages for energy storage, renewables and electronic load integration. However, its implementation is highly restricted by the development of dc protection system. Especially, the series dc arc faults have been posing significant challenges due to low fault current level. This paper explores the impact of dc arc fault in dc microgrids with constant power loads (CPLs). An effective power flow and dc arc modeling method is presented, based on which the dc arc fault responses at different locations are analyzed. It is concluded that with a ring bus structure and droop control, the microgrid is naturally resistant to series dc arc fault at the source and dc buses. However, arc fault by the load side can still cause serious damages. Based on the fault responses study, dc arc detection and protection considerations are discussed.

11:45AM Stability Analysis and Improvement of a Dual Active Bridge (DAB) Converter Enabled DC Microgrid based on a Reduced-order Low Frequency Model [#457]
Qing Ye, Ran Mo and Hui Li, Florida State Univeristy, United States

This paper analyzes the harmonic instability due to interactions among power converters and negative incremental impedance of load converters in a dual active bridge (DAB) converter enabled DC microgrid. Based on derived system impedances, it is found that the challenge of a DAB converter enabled microgrid stability is low frequency terminal behaviors of integrated units, which is different from other converters powered DC microgrids. At this frequency range, tightly regulated load converter exhibits constant power load (CPL) behavior even with low control bandwidth, which degrades system stability by aggravating interactions among power converters. In addition, the deployed power management strategy enables mode transition of energy storage units to achieve high reliability, which further complicates system impedance characteristics. To solve these issues, global minor loop gain (GMLG) and unified stability metric (USM) are derived to analyze system stability under different operation mode. A reduced-order low frequency model is developed to provide an insightful view of resonance mechanism. Based on the proposed model, the effect of power converter interactions and constant power load behavior are analyzed coordinately. Finally, an effective impedance shaping technique is proposed to improve system stability by eliminating resonance path in the reduced-order low frequency model. Experimental results and more simulation results will be provided in the final paper.

Datacenters and Telecommunication Applications

Wednesday, September 21, 10:30AM-12:10PM, Room: 102E, Chair: Philip Krein, Johan Enslin

10:30AM Soft-Switching Operation of Edge-Resonant Output-Inductor-Less Full-Bridge Converter [#636]
Kazuhide Domoto, Yoichi Ishizuka, Seiya Abe and Tamotsu Ninomiya, Nagasaki University, Japan; Kyushu Institute of Technology, Japan; Green Electronics Research Institute, Kitakyushu, Japan

Recently, the rapid growth of internet traffic has increased the number of ICT equipment in a data center, and the electric power consumption has also been increased. Therefore, the energy-saving techniques are required in a data center. In order to satisfy the energy-saving and increase the data-center scale, the High-Voltage Direct-Current (HVDC) power distribution system is effective. This system has an advantage of higher efficiency due to the smaller number of conversion stages when compared with the conventional AC system. Furthermore, ICT equipment and its power supply units should be miniaturized so as to install the much large number of equipment in a limited space of the data center. Two concepts of the energy saving and space saving are combined into high power density of the power converter systems. From this background, the circuit topology and implementation technique of a rectifier unit which is a part of power supply unit in the HVDC distribution system have been investigated before. Here, an Output-Inductor-Less (OIL) full-bridge converter has been proposed. This proposed circuit topology suppresses the surge voltage due to the recovery of side diodes, and miniaturizes the converter because the number of circuit components is reduced. On the other hand, some problems occur, such as the increasing switching-loss of primary switches and another high-frequency noise generation. This paper proposes a novel synchronous rectifier driving for the OIL full-bride converter in order to solve these problems, and examines the noise reduction effect, and the relationship between ZVS operation condition and circuit parameters. The proposed method does not need an external component, and then the smaller size is maintained.

10:55AM High Efficiency Two-Stage 48V VRM with PCB Winding Matrix Transformer [#940]
Mohamed Ahmed, Chao Fei, Fred C. Lee and Qiang Li, CPES - Virginia Tech, United States

High efficiency power supply solutions for data centers are gaining more attention, in order to minimize the fast growing power demands of such loads, the 48V Voltage Regulator Module (VRM) for powering CPU is a promising solution replacing the legacy 12V VRM by which the bus distribution loss, cost and size can be dramatically minimized. In this paper, a two-stage 48V-12V-1.8V 250W VRM is proposed, the first stage is a high efficiency, high power density isolated - unregulated DC-DC converter (DCX) based on LLC resonant converter stepping the input voltage from 48V to 12V. The Matrix transformer concept was utilized for designing the high frequency transformer of the first stage, an enhanced termination loop for the synchronous rectifiers and a non-uniform winding structure is proposed resulting in significant increase in both power density and efficiency of the first stage converter. The second stage is a 4-phases buck converter stepping the voltage from 12V to 1.8V to the CPU. Since the CPU runs in the sleep mode most of the time a light load efficiency improvement method by changing the bus voltage from 12V to 6V during light load operation is proposed showing more than 8% light load efficiency enhancement than fixed bus voltage. Experimental results demonstrate the high efficiency of the proposed solution reaching peak of 91% with a significant light load efficiency improvement.

11:20AM Hierarchical Protection Architecture for 380V DC Data Center Application [#1475]
Kai Tan, Xiaoqing Song, Chang Peng, Pengkun Liu and Alex Huang, North Carolina State University, United States; North Carolina State Univeristy, United States

The DC distribution system is becoming an appealing spot due to its higher energy efficiency in recent years. Nowadays, it has been already applied in data centers, commercial buildings, electrical vehicles charger station and DC micro grid systems, etc. However, there are a lot of challenges in DC application which is not critical in traditional AC system, such as arcing, capacitive charging and discharging, etc. All of them make the protection strategy and architecture an important issue for DC application. In this paper, one 3-level hierarchy circuit protection architecture is proposed with developed solid state circuit protection hardware. It is designed with considering the power rating for DC data center load conditions. Analysis and experimental results based on 380V DC voltage have been conducted and discussed.

11:45AM Device Loss Comparison of GaN Device Based LLC, Dual Active Bridge and Phase Shift Quasi Switched Capacitor Circuit [#783]
Boxue Hu, Xuan Zhang, Lixing Fu, He Li, Yousef M. Abdullah, Yafeng Wang, Lurao Liu and Jin Wang, The Ohio State University, United States

Gallium Nitride (GaN) power devices become commercially available in recent years and they have demonstrated great potential in DC power supply applications. In this paper, the device loss of three GaN device based isolated DC/DC circuits, LLC circuit, dual active bridge (DAB) circuit and phase shift quasi switched capacitor (QSC) circuit, is investigated and compared using telecom power supply application as an example. The device loss of the three circuits at various load and operation frequency conditions is calculated and compared for a 1 kW, 400 to 48V application case. The comparison results show that phase shift QSC circuit is a promising circuit candidate for DC power supply applications. A 1 kW, 0.5 MHz, 400-48 V GaN device based phase shift QSC converter prototype is built to verify the analysis results.

Transportation Electrification II

Wednesday, September 21, 10:30AM-12:10PM, Room: 102D, Chair: Sinisa Jurkovic, Bruno Lequesne

10:30AM Loss Optimizing Control of a Multiphase Interleaving DC-DC Converter for Use in a Hybrid Electric Vehicle Drivetrain [#1098]
Rashidreza Karimi, Dennis Kaczorowski, Alexander Zlotnik and Mertens Axel, Leibniz University of Hannover, Germany

In this paper, the application of a multiphase interleaving DC-DC converter in the drivetrain of an electric vehicle is studied. At first, a method for controlling the converter is proposed which ensures its operation under variable switching frequency and changing of the number of active phases. The implemented cascade control is designed with the help of a small signal model of the multiphase converter. The controller also features a nonlinear feedforward compensator to improve the transient performance. In the next step, different loss optimizing strategies are developed and discussed, based on the temperature-dependent loss model of the drivetrain. These strategies are to vary switching frequency, DC-link voltage and the number of active phases as well as a so-called passive mode operation. Finally, the efficiency difference between a conventional drivetrain and the modified one is presented which shows efficiency improvement especially at partial load. A test setup is also constructed for experimental results which will be presented at the end of this paper.

10:55AM Traction Inverter Evaluation Method Based on Driving Cycles for Electric and Hybrid Electric Vehicles [#677]
Fan Xu and Lihua Chen, Ford Motor Company, United States

With the increasing demand for environment-friendly and high fuel economy vehicles, most of the automotive manufacturers are working on the development of their electric and hybrid electric vehicles (EVs/HEVs). The traction inverter plays a significant role in EV/HEV system and converts energy between the battery and the electric motors. One of the key challenges during the traction inverter development is how to evaluate its performance in the lab. This paper proposes a method to evaluate the performance of traction inverter in EVs/HEVs. Comparing with the traditional lab test methods, the proposed method uses the real driving cycles of the vehicle and illustrates the traction inverter performance in real driving conditions. The experimental results show the benefits of the proposed method.

11:20AM Model Predictive Control based Field-weakening Strategy for Traction EV used Induction Motor [#153]
Jianyong Su, Rui Gao and Iqbal Husain, Harbin Institue of Technology, China; North Carolina State University, United States

In typical traction Electric Vehicle applications, the DC-link voltage varies during transient accelerating and decelerating process in field-weakening region. The calculated reference voltages of current PI regulators tend to be larger than the one in steady state, which will result in the undesired flux-producing current oscillations. This further deteriorates the electromagnetic torque performance. To solve this issue, a model predictive control (MPC) based field-weakening algorithm is proposed for traction EV used low-voltage induction motor (IM). n this paper, the DC- link voltage utilization, which is usually set as high as possible to output maximum torque, is decreased temporarily to keep the flux-producing current unchanged during the braking process. The model predictive control is adopted for the voltage loop, in which the steady voltage is calculated with steady flux equation. The influence of overlarge voltage calculated from PI regulator is decreased. The simulation and experimental results provide the evidence of improvements of the proposed field- weakening algorithm.

11:45AM Design Optimization and Development of Electric Traction Machines for Cadillac CT6 PHEV [#1278]
Sinisa Jurkovic, Khwaja Rahman and Peter Savagian, General Motors, United States

The Cadillac CT6 plug-in hybrid electric vehicle (PHEV) power-split transmission architecture utilizes two motors. One is an induction motor type while the other is a permanent magnet AC (PMAC) motor type referred to as motor A and motor B respectively. Bar-wound stator construction is utilized for both motors. Induction motor-A winding is connected in delta and PMAC motor-B winding is connected in wye. Overall, the choice of induction for motor A and permanent magnet for motor B is well supported by the choice of hybrid system architecture and the relative usage profiles of the machines. This selection criteria along with the design optimization of electric motors, their electrical and thermal performances, as well as the noise, vibration, and harshness (NVH) performance are discussed in detail. It is absolutely crucial that high performance electric machines are coupled with high performance control algorithms to enable maximum system efficiency and performance. Specifically, key challenges toward that goal are inverter voltage utilization, for maximum power capability and accurate current control for torque production. We focus on the specific challenges in controlling induction machines where the leading requirement form the machine design side to lower leakage inductance has negative ramification on the controllability of the machine.

PFC Rectifiers

Wednesday, September 21, 10:30AM-12:10PM, Room: 202E, Chair: Ned Mohan, Alessandro Costabeber

10:30AM Active Virtual Ground - Bridgeless PFC Topology [#550]
Carl Ngai-Man Ho, River Tin-Ho Li and Ken King-Man Siu, University of Manitoba, Canada; ABB (China) Ltd., China

The paper presents a new bridgeless Power Factor Correction (PFC) topology, using a recently proposed controllable LCL filter, namely Active Virtual Ground (AVG) to achieve efficient power conversion and high frequency (HF) common mode voltage (CM) reduction. The proposed PFC circuit consists of high frequency semiconductors for shaping inductor current, and low frequency semiconductors to form two different LCL structures for different conditions. This reduces grid differential mode (DM) current ripple or inductance. Besides, the PFC CM voltage, a main problem of bridgeless PFCs, is significantly reduced, since the capacitor in the LCL filter clamps the voltage between the grid and the converter ground. The performance of the proposed PFC is experimentally verified. The results show that the proposed PFC guarantees sinusoidal input current, low high frequency common-mode voltage noise and has a good agreement with the theoretical findings.

10:55AM A 500 kHz, 3 kW power factor correction circuit with low loss auxiliary ZVT circuit [#1493]
Siddharth Kulasekaran and Raja Ayyanar, Arizona State University, United States

The paper presents a low-loss auxiliary circuit in a power factor correction (PFC) circuit to achieve zero voltage transition and hence improving the efficiency and operating frequency. The high dynamic energy generated in the switching node during turn-on is diverted by providing a parallel path through an auxiliary inductor and a transistor placed across the main inductor. The auxiliary devices operate at zero current switching and this addition has no effect on the control of the main PFC circuit. The paper discusses the operating principles, design and merits of the proposed scheme with hardware validation on a 3kW/ 500 kHz PFC prototype.

11:20AM A Two-Switch Buck-Boost PFC Rectifier With Automatic AC Power Decoupling Capability [#754]
Wenlong Qi, Sinan Li, Siew Chong Tan and Shu Yuen Ron Hui, The University of Hong Kong, Hong Kong

In this paper, a single-stage power-factor-correction (PFC) rectifier with active power decoupling function is proposed. The proposed rectifier has a low component count as compared to existing solutions. Only two active switches, one inductor and one small power-buffering capacitor are needed. High power factor, wide output voltage range and active power decoupling can be simultaneously obtained. In addition, the rectifier has an inherent automatic power decoupling capability, and no dedicated active power decoupling control is required. Therefore, the control of the rectifier is simple and easy to implement. A 100 W prototype of the proposed rectifier with 110 Vrms/50 Hz input and a regulated DC output voltage ranging from 30 V to 100 V has been constructed and tested. The results show that with only a 15 uF power-buffering capacitor, a power factor of over 0.98, peak efficiency of 93.9% and output voltage ripple of less than 3% has been achieved.

11:45AM High Efficiency Bridgeless Power Factor Correction Buck Converter for High Frequency AC Systems [#1396]
Zhe Yang, Sitthisak Kiratipongvoot and Chi Kwan Lee, The University of Hong Kong, Hong Kong

This paper presents a bridgeless power factor correction (PFC) buck converter for high frequency AC systems. This PFC converter utilizes series resonant circuit at the AC-side to perform the PFC and buck topology at the DC-side to regulate the output voltage. In order to reduce the number of components and to improve the efficiency of the converter, a bridgeless topology is proposed. A detailed circuit analysis has been done. The AC to DC voltage conversion ratio and boundary of the converter operation are explicitly expressed. Afterwards, experimental results are provided to verify the operation of the topology. The converter prototype operates at 100 kHz with an output power of 10 W. Its efficiency is over 90 %. The total harmonic distortion of the input AC current at full load condition is less than 20 %.

Modeling and Control of Multilevel converters

Wednesday, September 21, 10:30AM-12:10PM, Room: 202B, Chair: Mengqi Wang, Marcello Pucci

10:30AM An Improved Proportional Pulse Compensation Strategy for DC Voltage Balance of Cascaded H-Bridge Rectifier [#81]
Xiang Li, Jian Wang, Xiaojie You and Kun Wang, Beijing Jiaotong University, China

DC voltage balance strategy is an important control part for Cascaded H-Bridge Rectifier. Proportional pulse compensation strategy is a typical voltage balance strategy, which can realize DC voltage balance with good performance under special working condition. However, the balance effect may be influenced by load current, and it is hard for self adoption under different load conditions. This paper proposes a kind of improved voltage balance strategy through modeling analysis on the circuit on the basis of this proportional pulse compensation strategy. The load current is introduced to the regulator, so as to better realize DC voltage balance under different load conditions. Simulation and experimental results verify the proposed improved strategy.

10:55AM Cost effective Capacitor Voltage Balancing Control for Five-level Grid-tied Inverters [#38]
Mingchen Gu, Li Zhang, Kai Sun, Yan Xing and Peng Xu, Nanjing Univ. of Aeronautics and Astronautics, China; Hohai University, China; Tsinghua University, China

The neutral point (NP) potential self-balancing of five-level full bridge inverters with conventional modulation strategy is related to the modulation index. Both the voltages of two split-capacitors should be sampled and controlled, when the inverter operates with the low modulation index. Therefore, an improved modulation strategy is proposed to realize the NP potential self-balancing for five-level full bridge inverters within the whole modulation index range. Only the sum of input split- capacitors voltage needs to be sampled, and the hardware cost is reduced. Experimental results verify the effectiveness of the improved modulation strategy.

11:20AM A Single Phase T-type Inverter Operating in Boundary Conduction Mode [#393]
Zhen Zhang, Junming Zhang and Xinke Wu, Zhejiang university, China; Zhejiang University, China

This paper proposes a single phase T-type inverter operating in boundary conduction mode (BCM). In the past, boundary conduction mode has been widely used to achieve valley voltage switching. In this paper, one switching leg of a full-bridge inverter is replaced by a T-type switching leg to further improve the efficiency. Because the T-type switching leg generates three voltage levels, the voltage stress across switches is halved and the switching frequency decreases compared with the conventional two-level full-bridge inverter operating in BCM. As a result, the switching losses and inductor core losses are largely reduced and the efficiency is improved. The characteristics of the proposed inverter are detailed in this paper. A prototype is built and experimental results validate the superiority of the proposed inverter over the conventional two-level full-bridge inverter.